In recent years, with the advancement of digital technologies, higher functionality of electronic hardware such as portable information devices and information appliances have been provided. With the progress of the higher functionality of the electronic hardware, miniaturization and an increase in a speed of semiconductor elements for use with them have been making rapid progress. Among them, applications of a nonvolatile memory element using a ferroelectric capacitor film or the like which is capable of writing and reading at a high speed with low electric consumption, as a material for a memory portion, have spread at a rapid pace.
Furthermore, since the nonvolatile memory element using a resistance variable layer as a material for a memory portion can constitute a memory element only by using a resistance variable element, further miniaturization, an increase in a speed, and lower electric power consumption of the nonvolatile memory element have been expected.
When using the resistance variable layer as the material for the memory portion, it is required that its resistance value vary from a high-resistance value to a low-resistance value or from the low-resistance value to the high-resistance value by applying electric pulses such that these two values are clearly distinguished and the resistance value stably varies.
To achieve such a stable resistance switching operation, there has been disclosed a structure of non-symmetric memory cells for securing sufficient resistance state switching using a memory resistance material such as a CMR (colossal magnetro-resistance) material, and a manufacturing method thereof (see Patent document 1, 2 for example). The non-symmetric memory cell is formed by a step for forming a lower electrode having a first area, a step for forming an electrical pulse variable resistance (EPVR) material on the lower electrode, and a step for forming an upper electrode on the EPVR layer so as to have a second area smaller than the first area. In such a non-symmetric electrode configuration in which the electrodes are different in size, only an EPVR material located adjacent the upper electrode having the smaller area than the lower electrode increases in a current density and enables resistance switching to occur, by suitably selecting a magnitude of a current flowing in the non-symmetric memory cell. In this manner, because of the non-symmetric configuration of the electrodes, the non-symmetric memory cell can continue to vary the resistance stably, by externally applying a voltage or a current.
There is also disclosed a structure in which a memory element and a control element are formed to extend in a horizontal direction and the memory element has a cross-sectional area smaller than that of the control element so that the memory element can change a state at an energy level lower than that of the control element (e.g., Patent document 3). Such a configuration is intended to attain a memory structure which is economical and has a larger capacity.
Patent document 1: Japanese Laid-Open Patent Application Publication No. 2004-349691
Patent document 2: Japanese Laid-Open Patent Application Publication No. 2005-175461
Patent document 3: Japanese Laid-Open Patent Application Publication No. 2004-6777